> For the complete documentation index, see [llms.txt](https://bob-mayo.gitbook.io/high-temperature-electronics/llms.txt). Markdown versions of documentation pages are available by appending `.md` to page URLs; this page is available as [Markdown](https://bob-mayo.gitbook.io/high-temperature-electronics/packaging.md). # Packaging ## Questions * ## Notes "The ceramic chip-level packages used for the NASA chips have been reported previously \[8, 36–39]. The ceramic packaging material was 96% aluminum oxide (Al2O3) substrate and Au thick-film metallization. The SiC devices were electrically connected to each package’s eight input/output terminals via 1 mil diameter Au wires. Chip packages were then attached to a ceramic printed circuit board also utilizing a 96% Al2O3 substrate and Au thick- film metallization." \[1] "This paper covers the development of a geothermal ceramic circuit board technology using 3D traces in a machinable ceramic. Test results showing the circuit board to be operational to at least 550°C." *Developing 300°C Ceramic Circuit Boards*. Author: Randy A. Normann, CTO, Perma Works LLC Grant: DE-FG36-08GO10185 Report Period: January 2009 to November 2014 Date Compiled: Feb 15, 2015. Machinable ceramic plates are available from ## References \[1] "Extreme temperature 6H-SiC JFET integrated circuit technology", ![](/files/-MMEDtcvDQwM8Ww9rYkC) \[2] Dupont GreenTape 951 low temperature co-fired ceramic (LTCC) system, \[3] Dominik Jurków, Thomas Maeder, Arkadiusz Dąbrowski, Marina Santo Zarnik, Darko Belavič, Heike Bartsch, Jens Müller, Overview on low temperature co-fired ceramic sensors, Sensors and Actuators A: Physical, Volume 233, 2015, Pages 125-146, ISSN 0924-4247, . ()